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NCP9004 2.65 W Filterless Class-D Audio Power Amplifier The NCP9004 is a cost-effective mono Class-D audio power amplifier capable of delivering 2.65 W of continuous average power to 4.0 W from a 5.0 V supply in a Bridge Tied Load (BTL) configuration. Under the same conditions, the output power stage can provide 1.4 W to a 8.0 W BTL load with less than 1% THD+N. For cellular handsets or PDAs it offers space and cost savings because no output filter is required when using inductive tranducers. With more than 90% efficiency and very low shutdown current, it increases the lifetime of your battery and drastically lowers the junction temperature. The NCP9004 processes analog inputs with a pulse width modulation technique that lowers output noise and THD when compared to a conventional sigma-delta modulator. The device allows independent gain while summing signals from various audio sources. Thus, in cellular handsets, the earpiece, the loudspeaker and even the melody ringer can be driven with a single NCP9004. Due to its low 42 mV noise floor, A-weighted, a clean listening is guaranteed no matter the load sensitivity. Features http://onsemi.com MARKING DIAGRAM 9-PIN FLIP-CHIP CSP FC SUFFIX CASE 499E 1 MAQ A Y WW G = Device Code = Assembly Location = Year = Work Week = Pb-Free Package MAQG AYWW 1 PIN CONNECTIONS 9-Pin Flip-Chip CSP A1 INP B1 VP C1 INM A2 GND B2 VP C2 SD (Top View) A3 OUTM B3 GND C3 OUTP * Optimized PWM Output Stage: Filterless Capability * Efficiency up to 90% * * * * * * * * * * * * * * * Low 2.5 mA Typical Quiescent Current Large Output Power Capability: 1.4 W with 8.0 W Load and THD+N < 1% Wide Supply Voltage Range: 2.5-5.5 V Operating Voltage High Performance, THD+N of 0.03% @ Vp = 5.0 V, RL = 8.0 W, Pout = 100 mW Excellent PSRR (-65 dB): No Need for Voltage Regulation Surface Mounted Package 9-Pin Flip-Chip CSP (SnPb and Pb-Free) Fully Differential Design. Eliminates Two Input Coupling Capacitors Very Fast Turn On/Off Times with Advanced Rising and Falling Gain Technique External Gain Configuration Capability Internally Generated 250 kHz Switching Frequency Short Circuit Protection Circuitry "Pop and Click" Noise Protection Circuitry ORDERING INFORMATION See detailed ordering and shipping information on page 16 of this data sheet. Cs Audio Input from DAC Ri Ri INP INM SD VP OUTM OUTP Applications Input from Microcontroller Cellular Phone Portable Electronic Devices PDAs and Smart Phones Portable Computer GND Cs Ri 1.6 mm Ri 3.7 mm Solution Size (c) Semiconductor Components Industries, LLC, 2006 August, 2006 - Rev. 2 1 Publication Order Number: NCP9004/D NCP9004 TYPICAL APPLICATION BATTERY Cs Rf Ri INP BYPASS Negative Differential Input Vp BYPASS INTERNAL BIASING OUTP Ri BYPASS INM Rf 300 kW SD Vih Vil RAMP GENERATOR OUTM Vp Shutdown Control GND Positive Differential Input Figure 1. Typical Application PIN DESCRIPTION Pin No. A1 A2 A3 B1 B2 B3 C1 C2 Symbol INP GND OUTM Vp Vp GND INM SD Type I I O I I I I I Positive Differential Input. Analog Ground. Negative BTL Output. Power Analog Positive Supply. Range: 2.5 V - 5.5 V. Power Analog Positive Supply. Range: 2.5 V - 5.5 V. Analog Ground. Negative Differential Input. The device enters in Shutdown Mode when a low level is applied on this pin. An internal 300 kW resistor will force the device in shutdown mode if no signal is applied to this pin. It also helps to save space and cost. Positive BTL Output. Description C3 OUTP O http://onsemi.com 2 RL = 8 W Data Processor NCP9004 MAXIMUM RATINGS Symbol Vp Vin Iout Pd TA TJ Tstg RqJA - - - MSL Supply Voltage Input Voltage Max Output Current (Note 1) Power Dissipation (Note 2) Operating Ambient Temperature Max Junction Temperature Storage Temperature Range Thermal Resistance Junction-to-Air ESD Protection Human Body Model (HBM) (Note 4) Machine Model (MM) (Note 5) Latchup Current @ TA = 85C (Note 6) Moisture Sensitivity (Note 7) Rating Active Mode Shutdown Mode Max 6.0 7.0 -0.3 to VCC +0.3 1.5 Internally Limited -40 to +85 150 -65 to +150 90 (Note 3) > 2000 > 200 $70 Level 1 Unit V V A - C C C C/W V mA Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. The device is protected by a current breaker structure. See "Current Breaker Circuit" in the Description Information section for more information. 2. The thermal shutdown is set to 160C (typical) avoiding irreversible damage to the device due to power dissipation. 3. For the 9-Pin Flip-Chip CSP package, the RqJA is highly dependent of the PCB Heatsink area. For example, RqJA can equal 195C/W with 50 mm2 total area and also 135C/W with 500 mm2. When using ground and power planes, the value is around 90C/W, as specified in table. 4. Human Body Model: 100 pF discharged through a 1.5 kW resistor following specification JESD22/A114. B2 pin (Vp) qualified at 1500 V. 5. Machine Model: 200 pF discharged through all pins following specification JESD22/A115. 6. Latchup Testing per JEDEC Standard JESD78. 7. Moisture Sensitivity Level (MSL): 1 per IPC/JEDEC standard: J-STD-020A. http://onsemi.com 3 NCP9004 ELECTRICAL CHARACTERISTICS (Limits apply for TA = +25C unless otherwise noted) Symbol Vp Idd Characteristic Operating Supply Voltage Supply Quiescent Current Conditions TA = -40C to +85C Vp = 3.6 V, RL = 8.0 W Vp = 5.5 V, No Load Vp from 2.5 V to 5.5 V, No Load TA = -40C to +85C Vp = 4.2 V TA = +25C TA = +85C Vp = 5.5 V TA = +25C TA = +85C Vsdih Vsdil Fsw G Rs Vos Ton Toff Tsd Vn Shutdown Voltage High Shutdown Voltage Low Switching Frequency Gain Resistance from SD to GND Output Offset Voltage Turn On Time Turn Off Time Thermal Shutdown Temperature Ouput Noise Voltage Vp from 2.5 V to 5.5 V TA = -40C to +85C RL = 8.0 W - Vp = 5.5 V Vp from 2.5 V to 5.5 V Vp from 2.5 V to 5.5 V - Vp = 3.6 V, f = 20 Hz to 20 kHz no weighting filter with A weighting filter no weighting filter with A weighting filter Po RMS Output Power RL = 8.0 W, f = 1.0 kHz, THD+N < 1% Vp = 2.5 V Vp = 3.0 V Vp = 3.6 V Vp = 4.2 V Vp = 5.0 V RL = 8.0 W, f = 1.0 kHz, THD+N < 10% Vp = 2.5 V Vp = 3.0 V Vp = 3.6 V Vp = 4.2 V Vp = 5.0 V RL = 4.0 W, f = 1.0 kHz, THD+N < 1% Vp = 2.5 V Vp = 3.0 V Vp = 3.6 V Vp = 4.2 V Vp = 5.0 V RL = 4.0 W, f = 1.0 kHz, THD+N < 10% Vp = 2.5 V Vp = 3.0 V Vp = 3.6 V Vp = 4.2 V Vp = 5.0 V Min 2.5 - - - - - - - 1.2 - 190 285 kW Ri - - - - - - - - - - - - - - - - - - - - - - - - - - - - - Typ - 2.15 2.61 - 0.42 0.45 0.8 0.9 - - 250 300 kW Ri 300 6.0 9.0 5.0 160 65 42 70 48 0.32 0.48 0.7 0.97 1.38 0.4 0.59 0.87 1.19 1.7 0.49 0.72 1.06 1.62 2.12 0.6 0.9 1.33 2.0 2.63 Max 5.5 - - 4.6 mA 0.8 - mA 1.5 - - 0.4 310 315 kW Ri - - - - - - - - - - - - - - W - - - - - W - - - - - W - - - - - mVrms W V V kHz V V kW mV ms ms C mVrms Unit V mA Isd Shutdown Current http://onsemi.com 4 NCP9004 ELECTRICAL CHARACTERISTICS (Limits apply for TA = +25C unless otherwise noted) Symbol - Efficiency Characteristic Conditions RL = 8.0 W, f = 1.0 kHz Vp = 5.0 V, Pout = 1.2 W Vp = 3.6 V, Pout = 0.6 W RL = 4.0 W, f = 1.0 kHz Vp = 5.0 V, Pout = 2.0 W Vp = 3.6 V, Pout = 1.0 W THD+N Total Harmonic Distortion + Noise Vp = 5.0 V, RL = 8.0 W, f = 1.0 kHz, Pout = 0.25 W Vp = 3.6 V, RL = 8.0 W, f = 1.0 kHz, Pout = 0.25 W Vp from 2.5 V to 5.5 V Vic = 0.5 V to Vp - 0.8 V Vp = 3.6 V, Vic = 1.0 Vpp f = 217 Hz f = 1.0 kHz Vp_ripple_pk-pk = 200 mV, RL = 8.0 W, Inputs AC Grounded Vp = 3.6 V f = 217 kHz f = 1.0 kHz Min - - - - - - - - - Typ 91 90 82 81 0.05 0.09 -62 -56 -57 Max - - % - - % - - dB - - - dB Unit % CMRR Common Mode Rejection Ratio PSRR Power Supply Rejection Ratio - - -62 -65 - - Ci + Audio Input Signal - Ci Ri INP Ri NCP9004 OUTM Load INM VP OUTP GND 30 kHz Low Pass Filter + Measurement Input - 4.7 mF + - Power Supply Figure 2. Test Setup for Graphs NOTES: 1. Unless otherwise noted, Ci = 100 nF and Ri= 150 kW. Thus, the gain setting is 2 V/V and the cutoff frequency of the input high pass filter is set to 10 Hz. Input capacitors are shorted for CMRR measurements. 2. To closely reproduce a real application case, all measurements are performed using the following loads: RL = 8 W means Load = 15 mH + 8 W + 15 mH RL = 4 W means Load = 15 mH + 4 W + 15 mH Very low DCR 15 mH inductors (50 mW) have been used for the following graphs. Thus, the electrical load measurements are performed on the resistor (8 W or 4 W) in differential mode. 3. For Efficiency measurements, the optional 30 kHz filter is used. An RC low-pass filter is selected with (100 W, 47 nF) on each PWM output. http://onsemi.com 5 NCP9004 TYPICAL CHARACTERISTICS 100 90 DIE TEMPERATURE (C) 80 EFFICIENCY (%) 70 60 50 40 30 20 10 0 0 0.5 Pout (W) 1.0 Vp = 5 V RL = 8 W Class AB NCP9004 100 90 80 70 60 50 40 30 20 0 0.2 0.4 0.6 0.8 NCP9004 1.0 1.2 1.4 Vp = 5 V RL = 8 W Class AB Pout (W) Figure 3. Efficiency vs. Pout Vp = 5 V, RL = 8 W, f = 1 kHz 100 90 DIE TEMPERATURE (C) 80 EFFICIENCY (%) 70 60 50 40 30 20 10 0 0 0.1 0.2 0.3 0.4 Vp = 3.6 V RL = 8 W 0.5 0.6 0.7 Class AB NCP9004 60 55 50 45 40 35 30 25 20 0 Figure 4. Die Temperature vs. Pout Vp = 5 V, RL = 8 W, f = 1 kHz @ TA = +25C Class AB Vp = 3.6 V RL = 8 W NCP9004 0.1 0.2 0.3 0.4 0.5 0.6 0.7 Pout (W) Pout (W) Figure 5. Efficiency vs. P out Vp = 3.6 V, RL = 8 W, f = 1 kHz 90 80 70 EFFICIENCY % 60 50 40 30 20 10 0 0 0.5 1.0 Pout (W) 1.5 Vp = 5 V RL = 4 W 2.0 2.5 Class AB NCP9004 160 140 DIE TEMPERATURE (C) 120 100 80 60 40 20 0 Figure 6. Die Temperature vs. P out Vp = 3.6 V, RL = 8 W, f = 1 kHz @ TA = +25C Class AB Vp = 5 V RL = 4 W NCP9004 0.5 1.0 Pout (W) 1.5 2.0 Figure 8. Efficiency vs. Pout Vp = 5 V, RL = 4 W, f = 1 kHz Figure 7. Die Temperature vs. Pout Vp = 5 V, RL = 4 W, f = 1 kHz @ TA = +25C http://onsemi.com 6 NCP9004 TYPICAL CHARACTERISTICS 90 80 70 EFFICIENCY % 60 50 40 30 20 10 0 0 0.2 0.4 0.6 Pout (W) 0.8 Class AB Vp = 3.6 V RL = 4 W DIE TEMPERATURE (C) NCP9004 100 90 80 70 60 50 40 30 1.2 20 0 0.2 0.4 0.6 Pout (W) 0.8 1.0 NCP9004 Vp = 3.6 V RL = 4 W Class AB 1.0 Figure 9. Efficiency vs. Pout Vp = 3.6 V, RL = 4 W, f = 1 kHz 10 Vp = 5.0 V RL = 8 W f = 1 kHz THD+N (%) 10 Figure 10. Die Temperature vs. Pout Vp = 3.6 V, RL = 4 W, f = 1 kHz @ TA = +25C THD+N (%) 1.0 1.0 Vp = 4.2 V RL = 8 W f = 1 kHz 0.1 0.1 0.01 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 0.01 0 0.2 0.4 0.6 Pout (W) 0.8 1.0 1.2 Pout (W) Figure 11. THD+N vs. Pout Vp = 5 V, RL = 8 W, f = 1 kHz 10 Vp = 3.6 V RL = 8 W f = 1 kHz THD+N (%) 10 Figure 12. THD+N vs. Pout Vp = 4.2 V, RL = 8 W, f = 1 kHz THD+N (%) 1.0 1.0 Vp = 3 V RL = 8 W f = 1 kHz 0.1 0.1 0.01 0 0.2 0.4 Pout (W) 0.6 0.8 0.01 0 0.1 0.2 0.3 Pout (W) 0.4 0.5 0.6 Figure 13. THD+N vs. Pout Vp = 3.6 V, RL = 8 W, f = 1 kHz http://onsemi.com 7 Figure 14. THD+N vs. Pout Vp = 3 V, RL = 8 W, f = 1 kHz NCP9004 TYPICAL CHARACTERISTICS 10 Vp = 2.5 V RL = 8 W f = 1 kHz THD+N (%) 10 Vp = 5 V RL = 4 W f = 1 kHz THD+N (%) 1.0 1.0 0.1 0.1 0.01 0 0.1 0.2 Pout (W) 0.3 0.4 0.01 0 0.5 1.0 1.5 Pout (W) 2.0 2.5 Figure 15. THD+N vs. Pout Vp = 2.5 V, RL = 8 W, f = 1 kHz 10 Vp = 4.2 V RL = 4 W f = 1 kHz THD+N (%) 10 Figure 16. THD+N vs. Pout Vp = 5 V, RL = 4 W, f = 1 kHz THD+N (%) 1.0 1.0 Vp = 3.6 V RL = 4 W f = 1 kHz 0.1 0.1 0.01 0 0.5 1.0 Pout (W) 1.5 2.0 0.01 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 Pout (W) Figure 17. THD+N vs. Pout Vp = 4.2 V, RL = 4 W, f = 1 kHz 10 Vp = 3 V RL = 4 W f = 1 kHz THD+N (%) THD+N (%) 10 Figure 18. THD+N vs. Pout Vp = 3.6 V, RL = 4 W, f = 1 kHz Vp = 2.5 V RL = 4 W f = 1 kHz 1.0 1.0 0.1 0 0.2 0.4 Pout (W) 0.6 0.8 1.0 0.1 0 0.1 0.2 0.3 Pout (W) 0.4 0.5 0.6 Figure 19. THD+N vs. Power Out Vp = 3 V, RL = 4 W, f = 1 kHz http://onsemi.com 8 Figure 20. THD+N vs. Power Out Vp = 2.5 V, RL = 4 W, f = 1 kHz NCP9004 TYPICAL CHARACTERISTICS 2.0 RL = 8 W f = 1 kHz 1.5 2.0 Pout (W) 1.0 THD+N = 1% 0.5 0.5 0 2.5 0 2.5 Pout (W) THD+N = 10% 1.5 1.0 THD+N = 1% THD+N = 10% 3.0 2.5 RL = 4 W f = 1 kHz 3.0 3.5 4.0 4.5 5.0 3.0 3.5 4.0 4.5 5.0 POWER SUPPLY (V) POWER SUPPLY (V) Figure 21. Output Power vs. Power Supply RL = 8 W @ f = 1 kHz 10 10 Figure 22. Output Power vs. Power Suppy RL = 4 W @ f = 1 kHz THD+N (%) THD+N (%) 1.0 Vp = 2.5 V 0.1 Vp = 3.6 V Vp = 5 V 1.0 Vp = 2.5 V 0.1 Vp = 5 V 0.01 10 Vp = 3.6 V 0.01 10 100 1000 FREQUENCY (Hz) 10000 100000 100 1000 FREQUENCY (Hz) 10000 100000 Figure 23. THD+N vs. Frequency RL = 8 W, Pout = 250 mW @ f = 1 kHz -20 -30 -40 -50 -60 -70 -80 10 100 1000 FREQUENCY (Hz) Vp = 5 V Vp = 3.6 V Inputs to GND RL = 8 W 10000 100000 -20 -30 -40 -50 -60 -70 -80 10 Figure 24. THD+N vs. Frequency RL = 4 W, Pout = 250 mW @ f = 1 kHz PSSR (dB) PSSR (dB) Vp = 5 V Vp = 3.6 V Inputs to GND RL = 4 W 100 1000 FREQUENCY (Hz) 10000 100000 Figure 25. PSRR vs. Frequency Inputs Grounded, RL = 8 W, Vripple = 200 mvpkpk Figure 26. PSRR vs. Frequency Inputs grounded, RL = 4 W, Vripple = 200 mVpkpk http://onsemi.com 9 NCP9004 TYPICAL CHARACTERISTICS -20 -30 -40 -50 -60 -70 -80 10 100 1000 FREQUENCY (Hz) Vp = 3.6 V RL = 8 W QUIESCENT CURRENT (mA) 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 120 130 140 TEMPERATURE (C) 150 160 Thermal Shutdown Vp = 3.6 V RL = 8 W CMMR (dB) 10000 100000 Figure 27. PSRR vs. Frequency Vp = 3.6 V, RL = 8 W, Vic = 200 mvpkpk 900 SHUTDOWN CURRENT (nA) SHUTDOWN CURRENT (nA) 800 700 600 500 400 300 200 100 0 2.5 3.5 4.5 5.5 RL = 8 W 2.8 2.6 2.4 2.2 2.0 1.8 1.6 1.4 1.2 Figure 28. Thermal Shutdown vs. Temperature Vp = 5 V, RL = 8 W, RL = 8 W 1.0 2.5 3.5 4.5 5.5 POWER SUPPLY (V) POWER SUPPLY (V) Figure 29. Shutdown Current vs. Power Supply RL = 8 W 1000 Vp = 3.6 V RL = 8 W NOISE (mVrms) NOISE (mVrms) 1000 Figure 30. Quiescent Current vs. Power Supply RL = 8 W Vp = 5 V RL = 8 W 100 No Weighting 100 No Weighting With A Weighting With A Weighting 10 10 100 1000 10000 10 10 100 1000 10000 FREQUENCY (Hz) FREQUENCY (Hz) Figure 31. Noise Floor, Inputs AC Grounded with 1 mF Vp = 3.6 V Figure 32. Noise Floor, Inputs AC Grounded with 1 mF Vp = 5 V http://onsemi.com 10 NCP9004 11 TA = +85C TURN OFF TIME (mS) TURN ON TIME (mS) 10 9 8 7 6 2.5 TA = +25C TA = -40C 7 TA = +25C 6 TA = +85C TA = -40C 8 5 3.5 4.5 5.5 4 2.5 3.5 4.5 5.5 POWER SUPPLY (V) POWER SUPPLY (V) Figure 33. Turn on Time Figure 34. Turn off Time Turn on time Output differential voltage Output differential voltage Turn off time Shutdown signal 0 2 4 6 8 10 12 (ms) 14 16 18 20 0 1 2 3 4 5 6 (ms) 7 Shutdown signal 8 9 10 Figure 35. Turn on sequence Vp = 3.6 V, RL = 8 W Figure 36. Turn off sequence Vp = 3.6 V, RL = 8 W http://onsemi.com 11 NCP9004 DESCRIPTION INFORMATION Detailed Description The basic structure of the NCP9004 is composed of one analog pre-amplifier, a pulse width modulator and an H-bridge CMOS power stage. The first stage is externally configurable with gain-setting resistor Ri and the internal fixed feedback resistor Rf (the closed-loop gain is fixed by the ratios of these resistors) and the other stage is fixed. The load is driven differentially through two output stages. The differential PWM output signal is a digital image of the analog audio input signal. The human ear is a band pass filter regarding acoustic waveforms, the typical values of which are 20 Hz and 20 kHz. Thus, the user will hear only the amplified audio input signal within the frequency range. The switching frequency and its harmonics are fully filtered. The inductive parasitic element of the loudspeaker helps to guarantee a superior distortion value. Power Amplifier (5.0 ms). This method to turn on the device is optimized in terms of rejection of "pop and click" noises. Thus, the total turn on time to get full power to the load is 9 ms (typical) (see Figure 35). The device has the same behavior when it is turned-off by a logic low on the shutdown pin. No power is delivered to the load 5 ms after a falling edge on the shutdown pin (see Figure 36). Due to the fast turn on and off times, the shutdown signal can be used as a mute signal as well. Shutdown Function The device enters shutdown mode when the shutdown signal is low. During the shutdown mode, the DC quiescent current of the circuit does not exceed 1.5 mA. Current Breaker Circuit The output PMOS and NMOS transistors of the amplifier have been designed to deliver the output power of the specifications without clipping. The channel resistance (Ron) of the NMOS and PMOS transistors is typically 0.3 W. Turn On and Turn Off Transitions In order to eliminate "pop and click" noises during transition, the output power in the load must not be established or cutoff suddenly. When a logic high is applied to the shutdown pin, the internal biasing voltage rises quickly and, 4 ms later, once the output DC level is around the common mode voltage, the gain is established slowly The maximum output power of the circuit corresponds to an average current in the load of 820 mA. In order to limit the excessive power dissipation in the load if a short-circuit occurs, a current breaker cell shuts down the output stage. The current in the four output MOS transistors are real-time controlled, and if one current exceeds the threshold set to 1.5 A, the MOS transistor is opened and the current is reduced to zero. As soon as the short-circuit is removed, the circuit is able to deliver the expected output power. This patented structure protects the NCP9004. Since it completely turns off the load, it minimizes the risk of the chip overheating which could occur if a soft current limiting circuit was used. http://onsemi.com 12 NCP9004 APPLICATION INFORMATION NCP9004 PWM Modulation Scheme The NCP9004 uses a PWM modulation scheme with each output switching from 0 to the supply voltage. If Vin = 0 V outputs OUTM and OUTP are in phase and no current is flowing through the differential load. When a positive signal is applied, OUTP duty cycle is greater than 50% and OUTM is less than 50%. With this configuration, the current through the load is 0 A most of the switching period and thus power losses in the load are lowered. OUTP OUTM +Vp 0V -Vp Load Current 0A Figure 37. Output Voltage and Current Waveforms into an Inductive Loudspeaker DC Output Positive Voltage Configuration Voltage Gain Optional Output Filter The first stage is an analog amplifier. The second stage is a comparator: the output of the first stage is compared with a periodic ramp signal. The output comparator gives a pulse width modulation signal (PWM). The third and last stage is the direct conversion of the PWM signal with MOS transistors H-bridge into a powerful output signal with low impedance capability. The total gain of the device is typically set to: 300 kW Ri The input coupling capacitor blocks the DC voltage at the amplifier input terminal. This capacitor creates a high-pass filter with Rin, the cut-off frequency is given by Fc + Input Capacitor Selection (Cin) When using an input resistor set to 150 kW, the gain configuration is 2 V/V. In such a case, the input capacitor selection can be from 10 nF to 1 mF with cutoff frequency values between 1 Hz and 100 Hz. The NCP9004 also includes a built in low pass filtering function. It's cut off frequency is set to 20 kHz. 2 p 1 Ri Ci . This filter is optional due to the capability of the speaker to filter by itself the high frequency signal. Nevertheless, the high frequency is not audible and filtered by the human ear. An optional filter can be used for filtering high frequency signal before the speaker. In this case, the circuit consists of two inductors (15 mH) and two capacitors (2.2 mF) (Figure 38). The size of the inductors is linked to the output power requested by the application. A simplified version of this filter requires a 1 mF capacitor in parallel with the load, instead of two 2.2 mF connected to ground (Figure 39). Cellular phones and portable electronic devices are great applications for Filterless Class-D as the track length between the amplifier and the speaker is short, thus, there is usually no need for an EMI filter. However, to lower radiated emissions as much as possible when used in filterless mode, a ferrite filter can often be used. Select a ferrite bead with the high impedance around 100 MHz and a very low DCR value in the audio frequency range is the best choice. The MPZ1608S221A1 from TDK is a good choice. The package size is 0603. http://onsemi.com 13 NCP9004 OUTM 15 mH OUTM 2.2 mF RL = 8 W 1.0 mF OUTP 15 mH 15 mH 15 mH RL = 8 W 2.2 mF OUTP Figure 38. Advanced Optional Audio Output Filter Figure 39. Optional Audio Output Filter OUTM RL = 8 W FERRITE CHIP BEADS OUTP Figure 40. Optional EMI Ferrite Bead Filter Cs VP INP INM OUTP OUTM Differential Audio Input from DAC Ri Ri Input from Microcontroller SD GND Figure 41. NCP9004 Application Schematic with Fully Differential Input Configuration Cs VP INP INM OUTP OUTM FERRITE CHIP BEADS Differential Audio Input from DAC Ri Ri Input from Microcontroller SD GND Figure 42. NCP9004 Application Schematic with Fully Differential Input Configuration and Ferrite Chip Beads as an Output EMI Filter http://onsemi.com 14 NCP9004 Cs Ci Differential Audio Input from DAC Ci Input from Microcontroller SD OUTP VP INP INM OUTM FERRITE CHIP BEADS Ri Ri GND Figure 44. NCP9004 Application Schematic with Differential Input Configuration and High Pass Filtering Function Cs Ci VP INP INM OUTP OUTM Ri Ri Single-Ended Audio Input from DAC Ci Input from Microcontroller SD GND Figure 43. NCP9004 Application Schematic with Single Ended Input Configuration PCB Layout Information NCP9004 is suitable for low cost solution. In a very small package it gives all the advantages of a Class-D audio amplifier. Due to its fully differential capability, the audio signal can only be provided by an input resistor. If a low pass filtering function is required, then an input coupling capacitor is needed. The values of these components determine the voltage gain and the bandwidth frequency. The battery positive supply voltage requires a good decoupling capacitor versus the expected distortion. When the board is using Ground and Power planes with at least 4 layers, a single 4.7 mF filtering ceramic capactior on the bottom face will give optimized performance. A 1.0 mF low ESR ceramic capacitor can also be used with slightly degraded performances on the THD+N from 0.06% up to 0.2%. In two layer application, if both Vp pins are connected on the top layer, two decoupling capacitors will improve the THD+N level. For example, a pair of capactors, 470 nF and 4.7 mF, are good choices for filtering the power supply. The NCP9004 power audio amplifier can operate from 2.5 V until 5.5 V power supply. With less than 2% THD+N, it delivers 500 mW rms output power to a 8.0 W load at Vp =3.0 V and 1.0 W rms output power at Vp = 4.0 V. http://onsemi.com 15 NCP9004 Note Figure 45. Top Layer Note: This track between Vp pins is only needed when a 2 layers board is used. In case of a typical 4 or more layers, the use of laser vias in pad will optimize the THD+N floor. ORDERING INFORMATION Device NCP9004FCT1G Marking MAQ Package 9-Pin Flip-Chip CSP (Pb-Free) Shipping 3000/Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 16 NCP9004 PACKAGE DIMENSIONS 9-PIN FLIP-CHIP CSP FC SUFFIX CASE 499E ISSUE O 4X -A- D -B- E A NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. COPLANARITY APPLIES TO SPHERICAL CROWNS OF SOLDER BALLS. MILLIMETERS MIN MAX 0.540 0.660 0.210 0.270 0.330 0.390 1.450 BSC 1.450 BSC 0.290 0.340 0.500 BSC 1.000 BSC 1.000 BSC 0.10 C 0.10 C 0.05 C -C- SEATING PLANE A2 A1 D1 e C B A DIM A A1 A2 D E b e D1 E1 e 1 2 3 E1 9X b 0.05 C A B 0.03 C SOLDERING FOOTPRINT* 0.50 0.0197 0.50 0.0197 0.265 0.01 SCALE 20:1 mm inches *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative http://onsemi.com 17 NCP9004/D |
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